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光电信息大讲堂第2期:硅基等比例缩小到后硅纳米技术
发布时间:2015-09-06 19:35:01 作者: 来源: 点击率:

报告题目:硅基等比例缩小到后硅纳米技术

From Silicon Scaling to Post-Silicon Nanotechnology

时   间:2015年1月15日 9:00-12:00

地   点:南五楼612学术报告厅

报告人:俞    滨  教授, 纽约州立大学

邀请人:邹雪城  教授

报告摘要

 本讲座将从材料、器件性能和集成的角度来介绍一些纳米尺度下硅基CMOS集成器件技术的总体趋势。最新工业研发的实例是超小尺寸器件技术,开展非传统晶体管机构的研究,聚焦于 “三维”双栅FinFET器件的设计与制造; 并将介绍新兴的自底向上的可综合的纳米结构和“后硅”的时代中相关纳米器件。同时会介绍一些最新的研究进展。

 In the first part of the seminar, some general trends in nanoscale silicon-based CMOS integrated device technology will be reviewed – from material, devices, performance, and integration perspective. As one of the examples of the latest industrial effort on developing ultra-scalable device technology, research on non-conventional transistor structure will be discussed with focus on designing and fabrication of the “three-dimensional” double-gate FinFET. In the second part of the seminar, the role of emerging bottom-up synthesized nanostructures and the associated nano-devices in the “post-silicon” era will be discussed. Some of the latest research progress will be presented.

报告人介绍

 美国纽约州立大学纳米科学与工程学院教授,IEEE Fellow,美国斯坦福大学电子工程系顾问教授,IBM杰出学者奖,加州大学伯克利分校特邀讲师,美国斯坦福大学特邀讲师。从事超大规模集成半导体器件、微细加工技术、纳米材料应用、微纳电子学研究。在半导体电子器件方面的成果包括首次实现工业界最小的平面型硅基CMOS场效应晶体管 (50nm, 35 nm, 15 nm 物理栅极长度),首次实现太赫兹开关速度硅基逻辑晶体管,和首次实现10nm栅极长度的双栅三维晶体管(FinFET )。是多个新型半导体器件结构和微细加工技术的发明人,拥有303项美国发明专利和数十项欧洲、日本专利。是全球半导体工业界拥有美国专利数量最多的研发人员之一,2011年被选为全美排名第三的“拥有最多专利的美国国家科学基金会支持的科学家"。

 Dr. Bin Yu is presently Full Professor in the College of Nanoscale Science & Engineering (CNSE), the State University of New York, Albany, with research interest on nanomaterial-inspired information processing, data storage, and energy harvesting. In particular, he is interested in the material synthesis and device applications of low-dimensional nanostructures (mono-/bilayer graphene and various semiconductor nanowires) for future-generation nanoelectronics, nanoexcitonics, and “green technology”. Since 2007 he has been Consulting Professor in the Paul Allen Center for Integrated Systems and the Department of Electrical Engineering at Stanford University. Before joining SUNY, he was with University of California / NASA Ames Research Center for Nanotechnology, leading the nanoelectronics research program. From 1997 to 2003 he was with Advanced Micro Devices, Inc., managing AMD’s strategic research program in exploratory silicon technology. He made several widely cited, record-breaking research breakthroughs in nanoscale silicon technology.